NIELIT and SCL Launch 1.2-Micron Process Design Kit

By Vikas Sir, Founder & Senior Faculty – Cosmo Classes | 24 July 2026

The National Institute of Electronics and Information Technology (NIELIT) has made the Semiconductor Laboratory\u2019s (SCL) indigenous 1.2-micrometre Process Design Kit (PDK) available through the eChipHub platform. Linked to 1.2µm CMOS technology, the PDK is meant for integrated circuit design, prototyping and semiconductor education across India.

A Process Design Kit contains the technical files, design rules and device models for a specific semiconductor manufacturing process. Chip designers use a PDK to create integrated circuits that match the parameters of a fabrication technology. This particular 1.2µm PDK is open-source and is built to work with open-source Electronic Design Automation (EDA) toolchains, lowering the cost barrier for learners and startups.

eChipHub is a MeitY-funded platform managed by NIELIT and jointly developed with SoCTeamup Semiconductors Private Limited. It provides a secure Aadhaar-authenticated download system for the PDK, ensuring verified access primarily for students and educational programmes. NIELIT functions under the Ministry of Electronics and Information Technology (MeitY).

The collaboration connects technical education with practical chip-development workflows used in the semiconductor sector. Nearly 30,000 students are expected to receive training through these programmes. On 27 May 2026, Sh. S. Krishnan, Secretary, MeitY, inaugurated the Open Source PDK for analog and digital flow in 1.2µm CMOS technology, marking a milestone in indigenous chip-design capacity building.

The initiative supports the India Semiconductor Mission, a Government of India programme for semiconductor ecosystem development. By providing free, indigenous design tools, it builds a skilled talent pipeline, reduces reliance on costly proprietary foreign toolchains, encourages domestic startups, and strengthens India\u2019s long-term strategic autonomy and self-reliance in the critical semiconductor value chain.

Important Facts for Exams

  • NIELIT and SCL launched an indigenous 1.2-micrometre Process Design Kit (PDK).
  • The PDK is available through the eChipHub platform and is open-source.
  • It is linked to 1.2µm CMOS (Complementary Metal-Oxide-Semiconductor) technology.
  • eChipHub is MeitY-funded, managed by NIELIT with SoCTeamup Semiconductors.
  • Downloads use a secure Aadhaar-authenticated system; ~30,000 students to be trained.
  • NIELIT functions under the Ministry of Electronics and IT (MeitY).
  • The initiative supports the India Semiconductor Mission.

Practice Questions (MCQs)

A total of 10 questions — 7 moderate level and 3 UPSC/RPSC level.

Moderate

Q1. NIELIT and SCL launched an indigenous Process Design Kit of which node size?

(A) 7 nanometre
(B) 28 nanometre
(C) 1.2 micrometre
(D) 5 micrometre
View Answer

Answer: C – 1.2 micrometre

Explanation: NIELIT made SCL\u2019s indigenous 1.2-micrometre Process Design Kit available for chip design and education.

Moderate

Q2. Through which platform is the 1.2-micron PDK made available?

(A) DigiLocker
(B) eChipHub
(C) UMANG
(D) GeM
View Answer

Answer: B – eChipHub

Explanation: The PDK is made available through eChipHub, a MeitY-funded platform managed by NIELIT.

Moderate

Q3. What does a Process Design Kit (PDK) contain?

(A) Only marketing files
(B) Technical files, design rules and device models
(C) Only source code of an OS
(D) Financial records
View Answer

Answer: B – Technical files, design rules and device models

Explanation: A PDK contains technical files, design rules and device models for a specific semiconductor manufacturing process.

Moderate

Q4. NIELIT functions under which ministry?

(A) Ministry of Education
(B) Ministry of Electronics and Information Technology (MeitY)
(C) Ministry of Science and Technology
(D) Ministry of Commerce
View Answer

Answer: B – Ministry of Electronics and Information Technology (MeitY)

Explanation: NIELIT functions under the Ministry of Electronics and Information Technology (MeitY).

Moderate

Q5. What does CMOS stand for?

(A) Central Memory Operating System
(B) Complementary Metal-Oxide-Semiconductor
(C) Computer Modular Output System
(D) Chip Manufacturing Operation Standard
View Answer

Answer: B – Complementary Metal-Oxide-Semiconductor

Explanation: CMOS stands for Complementary Metal-Oxide-Semiconductor, the technology the 1.2µm PDK is linked to.

Moderate

Q6. The eChipHub PDK uses which authentication system for downloads?

(A) PAN-based
(B) Aadhaar-authenticated
(C) Passport-based
(D) Voter ID-based
View Answer

Answer: B – Aadhaar-authenticated

Explanation: eChipHub provides a secure Aadhaar-authenticated download system for the PDK.

Moderate

Q7. The initiative supports which national mission?

(A) Digital India Mission
(B) India Semiconductor Mission
(C) National Solar Mission
(D) Skill India Mission
View Answer

Answer: B – India Semiconductor Mission

Explanation: The initiative supports the India Semiconductor Mission for semiconductor ecosystem development.

UPSC/RPSC

Q8. Why is the open-source nature of the 1.2µm PDK significant?

(A) It increases dependence on foreign tools
(B) It works with open-source EDA toolchains, lowering cost for learners and startups
(C) It bans chip fabrication
(D) It removes design rules
View Answer

Answer: B – It works with open-source EDA toolchains, lowering cost for learners and startups

Explanation: The open-source PDK works with open-source EDA toolchains, reducing cost barriers for students and startups.

UPSC/RPSC

Q9. SCL, associated with the PDK, is primarily linked to:

(A) Space launches
(B) Semiconductor research and fabrication in India
(C) Railway signalling
(D) Banking software
View Answer

Answer: B – Semiconductor research and fabrication in India

Explanation: SCL (Semiconductor Laboratory), Mohali, is associated with semiconductor research and fabrication in India.

UPSC/RPSC

Q10. The initiative most directly strengthens India\u2019s:

(A) Dependence on foreign proprietary tools
(B) Self-reliance and talent pipeline in the semiconductor value chain
(C) Coal exports
(D) Agricultural output
View Answer

Answer: B – Self-reliance and talent pipeline in the semiconductor value chain

Explanation: By providing free indigenous tools, it builds a skilled talent pipeline and strengthens self-reliance in the semiconductor value chain.

UPSC / RPSC Relevance

  • Prelims: NIELIT, SCL, eChipHub, India Semiconductor Mission, CMOS.
  • Mains GS-III: Science & technology, semiconductor ecosystem and indigenisation.
  • Economy / Industry: Skilling, startups and reducing import dependence.
  • Strategic Autonomy: Self-reliance in the critical semiconductor value chain.

UPSC Mains Descriptive Question

Building indigenous design capability is crucial for India\u2019s semiconductor ambitions. Discuss how initiatives like the open-source 1.2-micron PDK by NIELIT and SCL support the India Semiconductor Mission and strengthen self-reliance. (250 words, 15 marks)